HD64F3664BPV Datasheet, PDF (102/446 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Section 4 Address Break
When the address break is specified in the data read cycle
Register setting
• ABRKCR = H'A0
• BAR = H'025A
Program
0258 NOP
025A NOP
* 025C MOV.W @H'025A,R0
0260 NOP
Underline indicates the address
0262 NOP
to be stacked.
:
:
MOV MOV NOP MOV NOP Next
instruc- instruc- instruc- instruc- instruc- instru-
tion 1 tion 2 tion
tion
tion
ction Internal Stack
prefetch prefetch prefetch execution prefetch prefetch processing save
φ
Address
bus
Interrupt
request
025C 025E 0260 025A 0262
0264
Interrupt acceptance
SP-2
Figure 4.2 Address Break Interrupt Operation Example (2)
Rev. 6.00 Mar. 24, 2006 Page 72 of 412
REJ09B0142-0600