HD64F3664BPV Datasheet, PDF (378/446 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer

Appendix
Symbol
Description
⊕
Logical exclusive OR of the operands on both sides
¬
NOT (logical complement)
( ), < >
Contents of operand
Note: General registers include 8-bit registers (R0H to R7H and R0L to R7L) and 16-bit registers
(R0 to R7 and E0 to E7).
Condition Code Notation
Symbol
*
0
1
—
∆
Description
Changed according to execution result
Undetermined (no guaranteed value)
Cleared to 0
Set to 1
Not affected by execution of the instruction
Varies depending on conditions, described in notes
Rev. 6.00 Mar. 24, 2006 Page 348 of 412
REJ09B0142-0600