PIC18F87J11_12 Datasheet, PDF (77/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
FIGURE 6-7:
DATA MEMORY MAP FOR PIC18F87J11 FAMILY DEVICES
BSR<3:0>
= 0000
= 0001
= 0010
= 0011
= 0100
= 0101
= 0110
= 0111
= 1000
= 1001
= 1010
= 1011
= 1100
= 1101
= 1110
= 1111
Data Memory Map
00h
Bank 0
FFh
00h
Bank 1
FFh
00h
Bank 2
FFh
00h
Bank 3
FFh
00h
Bank 4
FFh
00h
Bank 5
FFh
00h
Bank 6
FFh
00h
Bank 7
FFh
00h
Bank 8
FFh
00h
Bank 9
FFh
00h
Bank 10
FFh
00h
Bank 11
FFh
00h
Bank 12
FFh
00h
Bank 13
FFh
00h
Bank 14
FFh
00h
Bank 15
FFh
Access RAM
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR
GPR^(1,2)
SFR
000h
05Fh
060h
0FFh
100h
1FFh
200h
2FFh
300h
3FFh
400h
4FFh
500h
5FFh
600h
6FFh
700h
7FFh
800h
8FFh
900h
9FFh
A00h
AFFh
B00h
BFFh
C00h
CFFh
D00h
DFFh
E00h
EFFh
F00h
F5Fh
F60h
FFFh
When a = 0:
The BSR is ignored and the
Access Bank is used.
The first 96 bytes are general
purpose RAM (from Bank 0).
The remaining 160 bytes are
Special Function Registers
(from Bank 15).
When a = 1:
The BSR specifies the bank
used by the instruction.
Access Bank
00h
Access RAM Low
5Fh
Access RAM High ^60h
(SFRs)
FFh
Note 1:
2:
Addresses, F5Ah through F5Fh, are also used by SFRs, but are not part of the Access RAM. Users must
always use the complete address, or load the proper BSR value, to access these registers.
Addresses, F40h to F59h, are not implemented and are not accessible to the user.
 2007-2012 Microchip Technology Inc.
DS39778E-page 77