English
Language : 

PIC18F87J11_12 Datasheet, PDF (242/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers
PIC18F87J11 FAMILY
20.3.4 ENABLING SPI I/O
To enable the serial port, MSSPx Enable bit, SSPEN
(SSPxCON1<5>), must be set. To reset or reconfigure
SPI mode, clear the SSPEN bit, re-initialize the
SSPxCON registers and then set the SSPEN bit. This
configures the SDIx, SDOx, SCKx and SSx pins as
serial port pins. For the pins to behave as the serial port
function, some must have their data direction bits (in
the TRIS register) appropriately programmed as
follows:
• SDIx must have the TRISC<4> or TRISD<5> bit set
• SDOx must have the TRISC<5> or TRISD<4> bit
cleared
• SCKx (Master mode) must have the TRISC<3> or
TRISD<6>bit cleared
• SCKx (Slave mode) must have the TRISC<3> or
TRISD<6> bit set
• SSx must have the TRISF<7> or TRISD<7> bit set
Any serial port function that is not desired may be
overridden by programming the corresponding Data
Direction (TRIS) register to the opposite value.
20.3.5 TYPICAL CONNECTION
Figure 20-2 shows a typical connection between two
microcontrollers. The master controller (Processor 1)
initiates the data transfer by sending the SCKx signal.
Data is shifted out of both shift registers on their pro-
grammed clock edge and latched on the opposite edge
of the clock. Both processors should be programmed to
the same Clock Polarity (CKP), then both controllers
would send and receive data at the same time.
Whether the data is meaningful (or dummy data)
depends on the application software. This leads to
three scenarios for data transmission:
• Master sends data–Slave sends dummy data
• Master sends data–Slave sends data
• Master sends dummy data–Slave sends data
FIGURE 20-2:
SPI MASTER/SLAVE CONNECTION
SPI Master SSPM<3:0> = 00xxb
SDOx
Serial Input Buffer
(SSPxBUF)
SDIx
SPI Slave SSPM<3:0> = 010xb
Serial Input Buffer
(SSPxBUF)
Shift Register
(SSPxSR)
MSb
LSb
PROCESSOR 1
SDIx
SDOx
SCKx
Serial Clock
SCKx
Shift Register
(SSPxSR)
MSb
LSb
PROCESSOR 2
DS39778E-page 242
 2007-2012 Microchip Technology Inc.