PIC18F87J11_12 Datasheet, PDF (312/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
The analog reference voltage is software selectable to
either the device’s positive and negative supply voltage
(AVDD and AVSS), or the voltage level on the
RA3/AN3/VREF+ and RA2/AN2/VREF- pins.
The A/D Converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
converter, which generates the result via successive
approximation.
Each port pin associated with the A/D Converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE bit (ADCON0<1>) is
cleared and A/D Interrupt Flag bit, ADIF, is set.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted. The value in the
ADRESH:ADRESL register pair is not modified for a
Power-on Reset. These registers will contain unknown
data after a Power-on Reset.
The block diagram of the A/D module is shown in
Figure 22-1.
FIGURE 22-1:
A/D BLOCK DIAGRAM
CHS<3:0>
10-Bit
A/D
Converter
Reference
Voltage
VAIN
(Input Voltage)
VCFG<1:0>
VREF+
VREF-
VDD⁽²⁾
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0100
0011
0010
0001
0000
AN15⁽¹⁾
AN14⁽¹⁾
AN13⁽¹⁾
AN12⁽¹⁾
AN11
AN10
AN9
AN8
AN7
AN6
AN4
AN3
AN2
AN1
AN0
VSS⁽²⁾
Note 1: Channels AN15 through AN12 are not available on 64-pin devices.
2: I/O pins have diode protection to VDD and VSS.
DS39778E-page 312
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