PIC18F87J11_12 Datasheet, PDF (104/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
7.5.3 WRITE VERIFY
Depending on the application, good programming
practice may dictate that the value written to the
memory should be verified against the original value.
This should be used in applications where excessive
writes can stress bits near the specification limit.
7.5.4
UNEXPECTED TERMINATION OF
WRITE OPERATION
If a write is terminated by an unplanned event, such as
loss of power or an unexpected Reset, the memory
location just programmed should be verified and repro-
grammed if needed. If the write operation is interrupted
by a MCLR Reset or a WDT Time-out Reset, during
normal operation, the user can check the WRERR bit
and rewrite the location(s) as needed.
7.6 Flash Program Operation During
Code Protection
See Section 25.6 “Program Verification and Code
Protection” for details on code protection of Flash
program memory.
TABLE 7-2: REGISTERS ASSOCIATED WITH PROGRAM FLASH MEMORY
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
TBLPTRU —
—
bit 21 Program Memory Table Pointer Upper Byte (TBLPTR<20:16>) 61
TBPLTRH Program Memory Table Pointer High Byte (TBLPTR<15:8>)
61
TBLPTRL Program Memory Table Pointer Low Byte (TBLPTR<7:0>)
61
TABLAT Program Memory Table Latch
61
INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE TMR0IF INT0IF
RBIF
61
EECON2 Program Memory Control Register 2 (not a physical register)
63
EECON1
—
—
WPROG FREE WRERR WREN
WR
—
63
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used during Flash program memory access.
DS39778E-page 104
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