PIC18F87J11_12 Datasheet, PDF (310/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
REGISTER 22-2: ADCON1: A/D CONTROL REGISTER 1⁽¹⁾
R/W-0
ADFM
bit 7
R/W-0
ADCAL
R/W-0
ACQT2
R/W-0
ACQT1
R/W-0
ACQT0
R/W-0
ADCS2
R/W-0
ADCS1
R/W-0
ADCS0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-3
bit 2-0
ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
ADCAL: A/D Calibration bit
1 = Calibration is performed on the next A/D conversion
0 = Normal A/D Converter operation (no conversion is performed)
ACQT<2:0>: A/D Acquisition Time Select bits
111 = 20 TAD
110 = 16 TAD
101 = 12 TAD
100 = 8 TAD
011 = 6 TAD
010 = 4 TAD
001 = 2 TAD
000 = 0 TAD
ADCS<2:0>: A/D Conversion Clock Select bits
111 = FRC (clock derived from A/D RC oscillator)⁽²⁾
110 = FOSC/64
101 = FOSC/16
100 = FOSC/4
011 = FRC (clock derived from A/D RC oscillator)⁽²⁾
010 = FOSC/32
001 = FOSC/8
000 = FOSC/2
Note 1: Default (legacy) SFR at this address, available when WDTCON<4> = 0.
2: If the A/D FRC clock source is selected, a delay of one TCY (instruction cycle) is added before the A/D
clock starts. This allows the SLEEP instruction to be executed before starting a conversion.
DS39778E-page 310
 2007-2012 Microchip Technology Inc.