PIC18F87J11_12 Datasheet, PDF (63/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
TABLE 5-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS⁽⁴⁾ (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Wake-up via WDT
or Interrupt
ADRESH
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
ADRESL
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
ADCON1
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
ANCON0
PIC18F6XJ1X PIC18F8XJ1X 00-0 0000
uu-u uuuu
uu-u uuuu
ANCON1
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
uuuu uuuu
uuuu uuuu
WDTCON
PIC18F6XJ1X PIC18F8XJ1X 0x-0 ---0
0x-u ---0
ux-u ---u
ECCP1AS
PIC18F6XJ1X PIC18F8XJ1X
0000 0000
0000 0000
uuuu uuuu
ECCP1DEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
CCPR1H
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1L
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
ECCP2AS
PIC18F6XJ1X PIC18F8XJ1X
0000 0000
0000 0000
uuuu uuuu
ECCP2DEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
CCPR2H
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR2L
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP2CON PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
ECCP3AS
PIC18F6XJ1X PIC18F8XJ1X
0000 0000
0000 0000
uuuu uuuu
ECCP3DEL PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
CCPR3H
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR3L
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP3CON PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
SPBRG1
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
RCREG1
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
TXREG1
PIC18F6XJ1X PIC18F8XJ1X xxxx xxxx
uuuu uuuu
uuuu uuuu
TXSTA1
PIC18F6XJ1X PIC18F8XJ1X 0000 0010
0000 0010
uuuu uuuu
RCSTA1
PIC18F6XJ1X PIC18F8XJ1X 0000 000x
0000 000x
uuuu uuuu
SPBRG2
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
RCREG2
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
TXREG2
PIC18F6XJ1X PIC18F8XJ1X 0000 0000
0000 0000
uuuu uuuu
TXSTA2
PIC18F6XJ1X PIC18F8XJ1X 0000 0010
0000 0010
uuuu uuuu
EECON2
PIC18F6XJ1X PIC18F8XJ1X ---- ----
---- ----
---- ----
EECON1
PIC18F6XJ1X PIC18F8XJ1X --00 x00-
--00 u00-
--00 u00-
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be effected (to cause wake-up).
4: See Table 5-2 for Reset value for specific conditions.
 2007-2012 Microchip Technology Inc.
DS39778E-page 63