PIC18F87J11_12 Datasheet, PDF (427/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
FIGURE 28-11: PARALLEL MASTER PORT READ TIMING DIAGRAM
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
System
Clock
PMA<18:13>
Address
PMD<7:0>
PMRD
PMWR
PMALL/
PMALH
PMCS<2:1>
Address<7:0>
PM2
PM3
PM1
PM6
Data
PM7
PM5
Operating Conditions: 2.0V < VCC < 3.6V, -40°C < TA < +85°C unless otherwise stated.
TABLE 28-17: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
Param.
No
Symbol
Characteristics
Min
Typ
PM1
PM2
PM3
PM5
PM6
PM7
PMALL/PMALH Pulse Width
—
Address Out Valid to PMALL/PMALH
—
Invalid (address setup time)
PMALL/PMALH Invalid to Address Out
—
Invalid (address hold time)
PMRD Pulse Width
—
PMRD or PMENB Active to Data In Valid
—
(data setup time)
PMRD or PMENB Inactive to Data In Invalid
—
(data hold time)
0.5 TCY
0.75 TCY
0.25 TCY
0.5 TCY
—
—
Max
Units
—
ns
—
ns
—
ns
—
ns
—
ns
—
ns
 2007-2012 Microchip Technology Inc.
DS39778E-page 427