PIC18F87J11_12 Datasheet, PDF (136/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
Table 11-2 summarizes the output capabilities of the
ports. Refer to the “Absolute Maximum Ratings” in
Section 28.0 “Electrical Characteristics” for more
details.
TABLE 11-2: OUTPUT DRIVE LEVELS
Port
Drive
Description
PORTA Minimum Intended for indication.
PORTF
PORTG
PORTH⁽¹⁾
PORTD
PORTE
PORTJ⁽¹⁾
Medium Sufficient drive levels for
external memory interfacing
as well as indication.
PORTB
PORTC
High Suitable for direct LED drive
levels.
Note 1: These ports are not available on 64-pin
devices.
11.1.3 PULL-UP CONFIGURATION
Four of the I/O ports (PORTB, PORTD, PORTE and
PORTJ) implement configurable weak pull-ups on all
pins. These are internal pull-ups that allow floating
digital input signals to be pulled to a consistent level,
without the use of external resistors.
The pull-ups are enabled with a single bit for each of the
ports: RBPU (INTCON2<7>) for PORTB, and RDPU,
REPU and RJPU (PORTG<7:5>) for the other ports.
11.1.4 INTERFACING TO A 5V SYSTEM
Though the VDDMAX of the PIC18F87J11 family is 3.6V,
these devices are still capable of interfacing with 5V
systems, even if the VIH of the target system is above
3.6V. This is accomplished by adding a pull-up resistor
to the port pin (Figure 11-2), clearing the LAT bit for that
pin and manipulating the corresponding TRIS bit
(Figure 11-1) to either allow the line to be pulled high,
or to drive the pin low. Only port pins that are tolerant of
voltages up to 5.5V can be used for this type of
interface (refer to Section 11.1.1 “Input Pins and
Voltage Considerations”).
FIGURE 11-2:
+5V SYSTEM HARDWARE
INTERFACE
PIC18F87J11
+5V
+5V Device
RD7
EXAMPLE 11-1: COMMUNICATING WITH
THE +5V SYSTEM
BCF LATD, 7 ; set up LAT register so
; changing TRIS bit will
; drive line low
BCF TRISD, 7 ; send a 0 to the 5V system
BSF TRISD, 7 ; send a 1 to the 5V system
DS39778E-page 136
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