PIC18F87J11_12 Datasheet, PDF (201/466 Pages) Microchip Technology – 64/80-Pin, High-Performance, 1-Mbit Flash Microcontrollers

PIC18F87J11 FAMILY
14.7 Considerations in Asynchronous
Counter Mode
Following a Timer1 interrupt and an update to the
TMR1 registers, the Timer1 module uses a falling edge
on its clock source to trigger the next register update on
the rising edge. If the update is completed after the
clock input has fallen, the next rising edge will not be
counted.
If the application can reliably update TMR1 before the
timer input goes low, no additional action is needed.
Otherwise, an adjusted update can be performed fol-
lowing a later Timer1 increment. This can be done by
monitoring TMR1L within the interrupt routine until it
increments, and then updating the TMR1H:TMR1L reg-
ister pair while the clock is low, or one-half of the period
of the clock source. Assuming that Timer1 is being
used as a Real-Time Clock, the clock source is a
32.768 kHz crystal oscillator. In this case, one-half
period of the clock is 15.25 s.
The Real-Time Clock application code in Example 14-1
shows a typical ISR for Timer1, as well as the optional
code required if the update cannot be done reliably
within the required interval.
EXAMPLE 14-1: IMPLEMENTING A REAL-TIME CLOCK USING A TIMER1 INTERRUPT SERVICE
RTCinit
RTCisr
MOVLW
MOVWF
CLRF
MOVLW
MOVWF
CLRF
CLRF
MOVLW
MOVWF
BSF
RETURN
80h
TMR1H
TMR1L
b’00001111’
T1CON
secs
mins
.12
hours
PIE1, TMR1IE
BTFSC
BRA
BTFSS
BRA
TMR1L,0
$-2
TMR1L,0
$-2
BSF
BCF
INCF
MOVLW
CPFSGT
RETURN
CLRF
INCF
MOVLW
CPFSGT
RETURN
CLRF
INCF
MOVLW
CPFSGT
RETURN
CLRF
RETURN
TMR1H, 7
PIR1, TMR1IF
secs, F
.59
secs
secs
mins, F
.59
mins
mins
hours, F
.23
hours
hours
; Preload TMR1 register pair
; for 1 second overflow
; Configure for external clock,
; Asynchronous operation, external oscillator
; Initialize timekeeping registers
;
; Enable Timer1 interrupt
; Insert the next 4 lines of code when TMR1
; can not be reliably updated before clock pulse goes low
; wait for TMR1L to become clear
; (may already be clear)
; wait for TMR1L to become set
; TMR1 has just incremented
; If TMR1 update can be completed before clock pulse goes low
; Start ISR here
; Preload for 1 sec overflow
; Clear interrupt flag
; Increment seconds
; 60 seconds elapsed?
; No, done
; Clear seconds
; Increment minutes
; 60 minutes elapsed?
; No, done
; clear minutes
; Increment hours
; 24 hours elapsed?
; No, done
; Reset hours
; Done
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DS39778E-page 201