LAN9500 Datasheet, PDF (71/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

LAN950x
TABLE 5-55: 4B/5B CODE TABLE (CONTINUED)
Code Group
SYM
Receiver Interpretation
Transmitter Interpretation
11101
11111
11000
10001
01101
00111
00100
F
F
1111
F
1111
I
IDLE
Sent after /T/R until TX_EN
J
First nibble of SSD, translated to “0101” Sent for rising TX_EN
following IDLE, else RX_ER
K
Second nibble of SSD, translated to
“0101” following J, else RX_ER
Sent for rising TX_EN
T
First nibble of ESD, causes de-assertion Sent for falling TX_EN
of CRS if followed by /R/, else assertion of
RX_ER
R Second nibble of ESD, causes
Sent for falling TX_EN
deassertion of CRS if following /T/, else
assertion of RX_ER
H Transmit Error Symbol
Sent for rising TX_ER
00110
11001
00000
00001
00010
00011
00101
01000
01100
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
V
INVALID, RX_ER if during RX_DV
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
INVALID
10000
V
INVALID, RX_ER if during RX_DV
INVALID
5.6.1.2 Scrambling
Repeated data patterns (especially the IDLE code-group) can have power spectral densities with large narrow-band
peaks. Scrambling the data helps eliminate these peaks and spread the signal power more uniformly over the entire
channel bandwidth. This uniform spectral density is required by FCC regulations to prevent excessive EMI from being
radiated by the physical wiring.
The scrambler also performs the Parallel In Serial Out conversion (PISO) of the data.
5.6.1.3 NRZI and MLT3 Encoding
The scrambler block passes the 5-bit wide parallel data to the NRZI converter where it becomes a serial 125MHz NRZI
data stream. The NRZI is encoded to MLT-3. MLT3 is a tri-level code where a change in the logic level represents a code
bit “1” and the logic output remaining at the same level represents a code bit “0”.
5.6.1.4 100M Transmit Driver
The MLT3 data is then passed to the analog transmitter, which launches the differential MLT-3 signal, on outputs TXP
and TXN, to the twisted pair media via a 1:1 ratio isolation transformer. The 10Base-T and 100Base-TX signals pass
through the same transformer so that common “magnetics” can be used for both. The transmitter drives into the 100Ω
impedance of the CAT-5 cable. Cable termination and impedance matching require external components.
5.6.1.5 100M Phase Lock Loop (PLL)
The 100M PLL locks onto reference clock and generates the 125MHz clock used to drive the 125 MHz logic and the
100Base-Tx Transmitter.
5.6.2 100BASE-TX RECEIVE
The receive data path is shown in Figure 5-18. Detailed descriptions are given in the following subsections.
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DS00001875A-page 71