LAN9500 Datasheet, PDF (129/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

LAN950x
7.3.9 LED GENERAL PURPOSE IO CONFIGURATION REGISTER (LED_GPIO_CFG)
Address:
024h
Size:
32 bits
This register configures the external GPIO[10:8] pins.
In order for a GPIO to function as a wake event or interrupt source, it must be configured as an input. GPIO pins used
to generate wake events must also be enabled by the GPIO_WAKE register, see Section 7.3.20, "General Purpose IO
Wake Enable and Polarity Register (GPIO_WAKE)".
Bits
Description
31 (LAN9500A/LAN9500Ai ONLY, Otherwise RESERVED)
LED Select (LED_SEL)
This bit determines the functionality of external LED pins.
BIT
VALUE
0
1
PIN NAME
nSPD_LED
nLNKA_LED
nFDX_LED
nSPD_LED
nLNKA_LED
nFDX_LED
FUNCTION
Speed Indicator
Link and Activity Indicator
Full Duplex Link Indicator
Note:
Hardware defaults to Activity
Indicator. Software must
manipulate to provide Full
Duplex indication.
Speed Indicator
Link Indicator
Activity Indicator
Type
R/W
Default
Note 7-11
Note: This field is protected by Reset Protection (RST_PROTECT).
30:26 RESERVED
RO
-
25:24 GPIO 10 Control (GPCTL10)
R/W
00b
The value of this field determines the function of the external GPIO10 pin as
follows:
00 = GPIO10
01 = nSPD_LED (Ethernet speed indicator LED)
10 = RXD0
11 = RXD3
Note:
When enabled as RXD0 or RXD3, the external device pin will reflect
the state of the corresponding internal MII signal. This feature is
useful as a diagnostic tool.
23:22 RESERVED
RO
-
21:20 GPIO 9 Control (GPCTL9)
R/W
00b
The value of this field determines the function of the external GPIO9 pin as
follows:
00 = GPIO9
01 = Note 7-12
10 = RXD1
11 = nPHY_RST
Note:
When enabled as RXD1 or nPHY_RST, the external device pin will
reflect the state of the corresponding internal MII signal. This feature
is useful as a diagnostic tool.
19:18 RESERVED
RO
-
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DS00001875A-page 129