LAN9500 Datasheet, PDF (18/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

LAN950x
TABLE 3-4: MISCELLANEOUS PINS
Num Pins
Name
Symbol
PHY Select PHY_SEL
1
System Reset
nRESET
1
Ethernet
Full-Duplex
Indicator LED
nFDX_LED
General GPIO8
Purpose I/O 8
1
Ethernet Link
Activity
Indicator LED
nLNKA_LED
General GPIO9
1
Purpose I/O 9
Buffer
Type
IS
(PD)
Description
Selects whether to use the internal Ethernet PHY
or the external PHY connected to the MII port.
0 = Internal PHY is used.
1 = External PHY is used.
Note:
When in external PHY mode, the internal
PHY is placed into general power down
after a POR. Please Refer to Section 5.6,
"10/100 Internal Ethernet PHY," on
page 69 for details.
IS
(PU)
OD12
(PU)
This active-low pin allows external hardware to
reset the device.
Note:
(LAN9500A/LAN9500Ai ONLY):
This pin may be used to signal
PME_CLEAR when PME mode of
operation is in effect. Refer to Section
6.0, "PME Operation," on page 112 for
additional information.
This pin is driven low (LED on) when the Ethernet
link is operating in full-duplex mode.
IS/O12/
OD12
(PU)
OD12
(PU)
IS/O12/
OD12
(PU)
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
Note 1: (LAN9500A/LAN9500Ai ONLY):
This pin may be used to signal PME
when External PHY and PME modes of
operation are in effect. Refer to
Section 6.0 “PME Operation” for addi-
tional information.
2: By default this pin is configured as a
GPIO.
This pin is driven low (LED on) when a valid link is
detected. This pin is pulsed high (LED off) for
80mS whenever transmit or receive activity is
detected. This pin is then driven low again for a
minimum of 80mS, after which time it will repeat
the process if TX or RX activity is detected.
Effectively, LED2 is activated solid for a link. When
transmit or receive activity is sensed, LED2 will
function as an activity indicator.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output, or a Schmitt-triggered input.
Note 1: (LAN9500A/LAN9500Ai ONLY):
This pin may serve as the PME_-
MODE_SEL input when External PHY
and PME modes of operation are in
effect. Refer to Section 6.0 “PME
Operation” for additional information.
2: By default this pin is configured as a
GPIO.
DS00001875A-page 18
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