LAN9500 Datasheet, PDF (102/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

LAN950x
FIGURE 5-31:
GPIOS 0-7 WAKE DETECTION LOGIC (LAN9500/LAN9500I)
IME
GPIOENn
GPIODIRn
GPIOPOLn
GPIOn
Latch
GPIODn
GPIOn_DET
GPIOn_INT clear
GPIOWKn
Note:
The IME bit is in the Hardware Configuration Register (HW_CFG). General Purpose IO Configuration Reg-
ister (GPIO_CFG) and General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) must be set
accordingly. Diagram does not represent actual hardware implementation.
FIGURE 5-32:
GPIOS 8-10 WAKE DETECTION LOGIC (LAN9500/LAN9500I)
IME
GPCTLn[1]
GPCTLn[0]
GPDIRn
GPIOPOLn
GPIOn
Latch
GPDn
GPIOn_DET
GPIOn_INT clear
GPIOWKn
Note:
The IME bit is in the Hardware Configuration Register (HW_CFG). General Purpose IO Configuration Reg-
ister (GPIO_CFG) and General Purpose IO Wake Enable and Polarity Register (GPIO_WAKE) must be set
accordingly. Diagram does not represent actual hardware implementation.
DS00001875A-page 102
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