LAN9500 Datasheet, PDF (130/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

LAN950x
Bits
17:16
15:11
10:8
7
6:4
3
2:0
Description
GPIO 8 Control (GPCTL8)
The value of this field determines the function of the external GPIO8 pin as
follows:
00 = GPIO8
01 = Note 7-13
10 = RXD2
11 = CRS
Note:
When enabled as RXD2 or CRS, the external device pin will reflect
the state of the corresponding internal MII signal. This feature is
useful as a diagnostic tool.
RESERVED
GPIO Buffer Type (GPBUF[10:8])
When set, the output buffer for the corresponding GPIO signal is configured
as a push/pull driver. When cleared, the corresponding GPIO signal is
configured as an open-drain driver. Bits are assigned as follows:
GPBUF8 – bit 8
GPBUF9 – bit 9
GPBUF10 – bit 10
RESERVED
GPIO Direction (GPDIR[10:8])
When set, enables the corresponding GPIO as an output. When cleared the
GPIO is enabled as an input. Bits are assigned as follows:
GPDIR8 – bit 4
GPDIR9 – bit 5
GPDIR10 – bit 6
RESERVED
GPIO Data (GPD[10:8])
When enabled as an output, the value written is reflected on GPIOn. When
read, GPIOn reflects the current state of the corresponding GPIO pin. Bits
are assigned as follows:
GPD8 – bit 0
GPD9 – bit 1
GPD10 – bit 2
Type
R/W
RO
R/W
RO
R/W
RO
R/W
Default
00b
-
000b
-
000b
-
Note 7-14
Note 7-11
Note 7-12
The default value for this bit is 0 when no EEPROM is present. If a EEPROM is present, the default
value is the value of the LED Select bit in the Configuration Flags of the EEPROM. A USB Reset or
Lite Reset (LRST) will cause this bit to be restored to the image value last loaded from EEPROM, or
to be set to 0 if no EEPROM is present.
(LAN9500/LAN9500i ONLY):
nLNKA_LED (Ethernet link activity LED)
Note 7-13
(LAN9500A/LAN9500Ai ONLY):
Determined by LED Select (LED_SEL) setting.
(LAN9500/LAN9500i ONLY):
nFDX_LED (Ethernet full-duplex LED)
Note 7-14
(LAN9500A/LAN9500Ai ONLY):
Determined by LED Select (LED_SEL) setting.
The default value depends on the state of the GPIO pin.
DS00001875A-page 130
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