LAN9500 Datasheet, PDF (21/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

LAN950x
TABLE 3-6:
Num Pins
ETHERNET PHY PINS (CONTINUED)
Name
Symbol
Buffer
Type
+3.3V Analog
VDD33A
P
Power Supply
Description
Refer to the device reference schematics for
connection information.
Note: Pin 7 is a no-connect (NC) for
4
LAN9500A/LAN9500Ai, but may be
connected to VDD33A for backward
compatibility with LAN9500/LAN9500i.
External PHY
Bias Resistor
EXRES
1
Ethernet PLL
Power Supply
VDDPLL
1
AI
Used for the internal bias circuits. Connect to an
external resistor to ground.
For LAN9500A/LAN9500Ai use 12.0K 1.0%
For LAN9500/LAN9500i use 12.4K 1.0%.
P
This pin must be connected to VDDCORE for
proper operation.
Refer to Section 4.0 “Power Connections” and
the device reference schematics for additional
connection information.
TABLE 3-7:
Num Pins
5
I/O POWER PINS, CORE POWER PINS, AND GROUND PAD
Name
Symbol
Buffer
Type
Description
+3.3V I/O
Power
VDD33IO
P
Refer to the device reference schematics for
connection information.
Digital Core
2
Power Supply
Output
Exposed pad
on package
bottom
(Figure 3-1)
Ground
VDDCORE
VSS
P
Refer to Section 4.0, "Power Connections" and the
device reference schematics for connection
information.
P
Common Ground
TABLE 3-8: NO-CONNECT PINS
Num Pins
Name
Symbol
1
No Connect
NC
Buffer
Type
-
Description
These pins must be left floating for normal device
operation.
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DS00001875A-page 21