LAN9500 Datasheet, PDF(61/213 Page) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

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LAN9500 Datasheet, PDF (61/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

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LAN950x

TABLE 5-48: WAKEUP FRAME FILTER REGISTER STRUCTURE (LAN9500A/LAN9500AI ONLY)

Filter 4 Byte Mask 0

Filter 4 Byte Mask 1

Filter 4 Byte Mask 2

Filter 4 Byte Mask 3

Filter 5 Byte Mask 0

Filter 5 Byte Mask 1

Filter 5 Byte Mask 2

Filter 5 Byte Mask 3

Filter 6 Byte Mask 0

Filter 6 Byte Mask 1

Filter 6 Byte Mask 2

Filter 6 Byte Mask 3

Filter 7 Byte Mask 0

Filter 7 Byte Mask 1

Filter 7 Byte Mask 2

Filter 7 Byte Mask 3

Reserved

Filter 3

Command

Reserved

Filter 2

Command

Reserved

Filter 1

Command

Reserved

Filter 0

Command

Reserved

Filter 7

Command

Reserved

Filter 6

Command

Reserved

Filter 5

Command

Reserved

Filter 4

Command

Filter 3 Offset

Filter 2 Offset

Filter 1Offset

Filter 0 Offset

Filter 7 Offset

Filter 6 Offset

Filter 5 Offset

Filter 4 Offset

Filter 1 CRC-16

Filter 0 CRC-16

Filter 3 CRC-16

Filter 2 CRC-16

Filter 5 CRC-16

Filter 4 CRC-16

Filter 7 CRC-16

Filter 6 CRC-16

The Filter i Byte Mask defines which incoming frame bytes Filter i will examine to determine whether or not this is a

Wakeup Frame. Table 5-49, describes the byte maskâs bit fields.

Filter x Mask 0 corresponds to bits [31:0]. Where the lsb corresponds to the first byte on the wire.

Filter x Mask 1 corresponds to bits [63:32]. Where the lsb corresponds to the first byte on the wire.

Filter x Mask 2 corresponds to bits [95:64]. Where the lsb corresponds to the first byte on the wire.

Filter x Mask 3 corresponds to bits [127:96]. Where the lsb corresponds to the first byte on the wire.

The following tables define elements common to both WUFF register structures.

TABLE 5-49: FILTER I BYTE MASK BIT DEFINITIONS

FILTER I BYTE MASK DESCRIPTION

Bits

Description

127:0

Byte Mask: If bit j of the byte mask is set, the CRC machine processes byte pattern-offset + j of the

incoming frame. Otherwise, byte pattern-offset + j is ignored.

The Filter i command register controls Filter i operation. Table 5-50 shows the Filter I command register.

ï£ 2010 - 2015 Microchip Technology Inc.

DS00001875A-page 61

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