LAN9500 Datasheet, PDF (198/213 Pages) SMSC Corporation – USB 2.0 to 10/100 Ethernet Controller Promiscuous mode

LAN950x
8.5.4 EEPROM TIMING
The following specifies the EEPROM timing requirements for the device:
FIGURE 8-4:
EEPROM TIMING
EECS
EECLK
EEDO
EEDI
EEDI (VERIFY)
t_cshckh
t_ckcyc
t_ckh t_ckl
t_dvckh t_ckhdis
t_dsckh
t_dhckh
t_cshdv
t_csl
t_cklcsl
t_ckldis
t_dhcsl
TABLE 8-17: EEPROM TIMING VALUES
Symbol
Description
t_ckcyc
t_ckh
t_ckl
t_cshckh
t_cklcsl
t_dvckh
t_ckhdis
t_dsckh
t_dhckh
t_ckldis
t_cshdv
t_dhcsl
t_csl
EECLK Cycle time
EECLK High time
EECLK Low time
EECS high before rising edge of EECLK
EECLK falling edge to EECS low
EEDO valid before rising edge of EECLK
EEDO disable after rising edge EECLK
EEDI setup to rising edge of EECLK
EEDI hold after rising edge of EECLK
EECLK low to data disable (OUTPUT)
EEDIO valid after EECS high (VERIFY)
EEDIO hold after EECS low (VERIFY)
EECS low
MIN
TYP
MAX
Units
1110
1130
ns
550
570
ns
550
570
ns
1070
ns
30
ns
550
ns
550
ns
90
ns
0
ns
580
ns
600
ns
0
ns
1070
ns
DS00001875A-page 198
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