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PIC16F193X Datasheet, PDF (64/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology
PIC16F193X/LF193X
3.5 Brown-Out Reset (BOR)
Brown-out Reset is enabled by programming the
BOREN<1:0> bits in the Configuration register. The
brown-out trip point is selectable from two trip points
via the BORV bit in the Configuration register.
Between the POR and BOR, complete voltage range
coverage for execution protection can be imple-
mented.
Two bits are used to enable the BOR. When
BOREN = 11, the BOR is always enabled. When
BOREN = 10, the BOR is enabled, but disabled during
Sleep. When BOREN = 01, the BOR is controlled by
the SBOREN bit of the BORCON register. When
BOREN = 00, the BOR is disabled.
If VDD falls below VBOR for greater than parameter
(TBOR) (see Section 28.0 “Electrical Specifica-
tions”), the Brown-out situation will reset the device.
This will occur regardless of VDD slew rate. A Reset is
not ensured to occur if VDD falls below VBOR for more
than parameter (TBOR).
If VDD drops below VBOR while the Power-up Timer is
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once VDD
rises above VBOR, the Power-up Timer will execute a
64 ms Reset.
TABLE 3-4: BOR OPERATING MODES
BOREN
Config bits
SBOREN
Device Mode
BOR Mode
Device
Operation upon
release of POR
Device
Operation upon
wake- up from
Sleep
BOR_ON (11)
X
X
Active
Waits for BOR ready(1)
BOR_NSLEEP (10)
X
BOR_NSLEEP (10)
X
Awake
Sleep
Active
Disabled
Waits for BOR ready
BOR_SBOREN (01)
1
X
Active
Begins immediately
BOR_SBOREN (01)
0
X
Disabled
Begins immediately
BOR_OFF (00)
X
X
Disabled
Begins immediately
Note 1: Even though this case specifically waits for the BOR, the BOR is already operating, so there is no delay in
startup.
FIGURE 3-4:
BROWN-OUT SITUATIONS
VDD
VBOR
Internal
Reset
64 ms(1)
VDD
VBOR
Internal
Reset
< 64 ms
64 ms(1)
VDD
Internal
Reset
64 ms(1)
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.
VBOR
DS41364A-page 62
Preliminary
© 2008 Microchip Technology Inc.