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PIC16F193X Datasheet, PDF (194/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology
PIC16F193X/LF193X
19.5.1 PWM PERIOD
The PWM period is specified by the PRx register of
Timerx. The PWM period can be calculated using the
formula of Equation 19-1.
EQUATION 19-1: PWM PERIOD
PWM Period = [(PR2x) + 1] • 4 • TOSC •
(TMRx Prescale Value)
Note 1: TOSC = 1/FOSC
When TMRx is equal to PRx, the following three events
occur on the next increment cycle:
• TMRx is cleared
• The CCPx pin is set. (Exception: If the PWM duty
cycle = 0%, the pin will not be set.)
• The PWM duty cycle is latched from CCPRxL into
CCPRxH.
Note:
The Timerx postscaler (see Section 17.1
“Timer2/4/6 Operation”) is not used in the
determination of the PWM frequency.
19.5.2 PWM DUTY CYCLE
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPRxL register and
DCxB<1:0> bits of the CCPxCON register. The
CCPRxL contains the eight MSbs and the DCxB<1:0>
bits of the CCPxCON register contain the two LSbs.
CCPRxL and DCxB<1:0> bits of the CCPxCON
register can be written to at any time. The duty cycle
value is not latched into CCPRxH until after the period
completes (i.e., a match between PRx and TMRx
registers occurs). While using the PWM, the CCPRxH
register is read-only.
Equation 19-2 is used to calculate the PWM pulse
width.
Equation 19-3 is used to calculate the PWM duty cycle
ratio.
EQUATION 19-2: PULSE WIDTH
Pulse Width = (CCPRxL:CCPxCON<5:4>) •
TOSC • (TMRx Prescale Value)
EQUATION 19-3: DUTY CYCLE RATIO
Duty Cycle Ratio = (---C----C----P----R---x---L-4--:-(-C-P---C-R---P-x---x--+-C----O1----)N----<----5---:--4--->-----)
The CCPRxH register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMRx register is concatenated with either
the 2-bit internal system clock (FOSC), or 2 bits of the
prescaler, to create the 10-bit time base. The system
clock is used if the Timerx prescaler is set to 1:1.
When the 10-bit time base matches the CCPRxH and
2-bit latch, then the CCPx pin is cleared (see
Figure 19-3).
DS41364A-page 192
Preliminary
© 2008 Microchip Technology Inc.