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PIC16F193X Datasheet, PDF (135/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology
PIC16F193X/LF193X
TABLE 11-1: ADC CLOCK PERIOD (TAD) VS. DEVICE OPERATING FREQUENCIES
ADC Clock Period (TAD)
Device Frequency (FOSC)
Device Frequency (FOSC)
ADC
Clock Source
ADCS<2:0>
32 MHz
20 MHz
16 MHz
8 MHz
4 MHz
1 MHz
Fosc/2
Fosc/4
Fosc/8
Fosc/16
Fosc/32
Fosc/64
FRC
000
62.5ns(2)
100 ns(2)
125 ns(2)
250 ns(2)
500 ns(2)
2.0 μs
100
125 ns(2)
200 ns(2)
250 ns(2)
500 ns(2)
1.0 μs
4.0 μs
001
0.5 μs(2)
400 ns(2)
0.5 μs(2)
1.0 μs
2.0 μs
8.0 μs(3)
101
800 ns
800 ns
1.0 μs
2.0 μs
4.0 μs
16.0 μs(3)
010
1.0 μs
1.6 μs
2.0 μs
4.0 μs
8.0 μs(3)
32.0 μs(3)
110
2.0 μs
3.2 μs
4.0 μs
8.0 μs(3)
16.0 μs(3)
64.0 μs(3)
x11
1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4) 1.0-6.0 μs(1,4)
Legend:
Note 1:
2:
3:
4:
Shaded cells are outside of recommended range.
The FRC source has a typical TAD time of 1.6 μs for VDD.
These values violate the minimum required TAD time.
For faster conversion times, the selection of another clock source is recommended.
When the device frequency is greater than 1 MHz, the FRC clock source is only recommended if the conversion will be
performed during Sleep.
FIGURE 11-2:
ANALOG-TO-DIGITAL CONVERSION TAD CYCLES
TCY - TAD TAD1 TAD2 TAD3 TAD4 TAD5 TAD6 TAD7 TAD8 TAD9 TAD10 TAD11
b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Conversion starts
Holding capacitor is disconnected from analog input (typically 100 ns)
Set GO bit
On the following cycle:
ADRESH:ADRESL is loaded, GO bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
© 2008 Microchip Technology Inc.
Preliminary
DS41364A-page 133