PIC16F193X Datasheet, PDF (337/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F193X/LF193X
25.0 IN-CIRCUIT SERIAL
PROGRAMMING™ (ICSP™)
ICSP™ programming allows customers to manufacture
circuit boards with unprogrammed devices. Programming
can be done after the assembly process allowing the
device to be programmed with the most recent firmware
or a custom firmware. Five pins are needed for ICSP™
programming:
• ICSPCLK
• ICSPDAT
• MCLR/VPP
• VDD
• VSS
In Program/Verify mode the Program Memory, User
IDs and the Configuration Words are programmed
through serial communications. The ICSPDAT pin is a
bidirectional I/O used for transferring the serial data
and the ICSPCLK pin is the clock input. For more infor-
mation on ICSP™ refer to the
“PIC16193X/PIC16LF193X Memory Programming
Specification” (DS41360A)
25.1 High-voltage Programming Mode
The device is placed into high-voltage Program/Verify
mode by holding the ICSPCLK and ICSPDAT pins low
then raising the voltage on MCLR/VPP to VIHH.
Note:
The ICD 2 produces a VPP voltage greater
than the maximum VPP specification of the
PIC16F193X/LF193X. When using this
programmer, an external circuit is required
to keep the VPP voltage within the device
specifications.
25.2 Low-Voltage Programming Mode
The Low-Voltage Programming mode allows the
PIC16F193X/LF193X devices to be programmed using
VDD only, without high voltage. When the LVP bit of the
Configuration Word 2 register is set to ‘1’, the
low-voltage ICSP programming entry is enabled. To
disable the Low-Voltage ICSP mode, the LVP bit must
be programmed to ‘0’.
Entry into the Low-Voltage ICSP Program/Verify modes
requires the following steps:
1. MCLR is brought to VIL.
2. A 32-bit key sequence is presented on
ICSPDAT, while clocking ICSPCLK.
Once the key sequence is complete, MCLR must be
held at VIL for as long as Program/Verify mode is to be
maintained.
FIGURE 25-1:
TYPICAL CONNECTION FOR ICSP™ PROGRAMMING
External
Programming
Signals
VDD
VPP
VSS
Data
Clock
VDD
10k
Device to be
Programmed
VDD
MCLR/VPP
VSS
ICSPDAT
ICSPCLK
*
*
*
To Normal Connections
* ^{Isolation devices (as required).}
© 2008 Microchip Technology Inc.
Preliminary
DS41364A-page 335