PIC16F193X Datasheet, PDF (325/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F193X/LF193X
REGISTER 23-5: EECON1: EEPROM CONTROL 1 REGISTER
R/W-0/0
EEPGD
bit 7
R/W-0/0
CFGS
R/W-0/0 R/W/HC-0/0 R/W-x/q
LWLO
FREE
WRERR
R/W-0/0
WREN
R/S/HC-0/0
WR
R/S/HC-0/0
RD
bit 0
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HC = bit is cleared by hardware
bit 7
EEPGD: Flash Program/Data EEPROM Memory Select bit
1 = Accesses program space Flash memory
0 = Accesses data EEPROM memory
bit 6
CFGS: Flash Program/Data EEPROM or Configuration Select bit
1 = Accesses Configuration, User ID and Device ID Registers
0 = Accesses Flash Program or data EEPROM Memory
bit 5
LWLO: Load Write Latches Only bit
If EEPGD = 1 or CFGS = 1: (accessing program Flash)
1 = The next WR command does not initiate a write to the PFM; only the program memory
latches are updated.
0 = The next WR command writes a value from EEDATH:EEDATL into program memory latches
and initiates a write to the PFM of all the data stored in the program memory latches.
If EEPGD = 0 and CFGS = 1: (Accessing data EEPROM)
LWLO is ignored. The next WR command initiates a write to the data EEPROM.
bit 4
FREE: Program Flash Erase Enable bit
If EEPGD = 1 or CFGS = 1: (accessing program Flash)
1 = Perform an program Flash erase operation on the next WR command (cleared by hardware
after completion of erase).
0 = Perform a program Flash write operation on the next WR command.
If EEPGD = 0 and CFGS = 0: (Accessing data EEPROM)
FREE is ignored. The next WR command will initiate both a erase cycle and a write cycle.
bit 3
WRERR: EEPROM Error Flag bit
1 = Condition could indicate an improper program or erase sequence attempt or termination (bit is set
automatically on any set attempt (write ‘1’) of the WR bit.
0 = The program or erase operation completed normally.
bit 2
WREN: Program/Erase Enable bit
1 = Allows program/erase cycles
0 = Inhibits programming/erasing of program Flash and data EEPROM
bit 1
WR: Write Control bit
1 = Initiates a program Flash or data EEPROM program/erase operation.
The operation is self-timed and the bit is cleared by hardware once operation is complete.
The WR bit can only be set (not cleared) in software.
0 = Program/erase operation to the Flash or data EEPROM is complete and inactive.
bit 0
RD: Read Control bit
1 = Initiates an program Flash or data EEPROM read. Read takes one cycle. RD is cleared in
hardware. The RD bit can only be set (not cleared) in software.
0 = Does not initiate a program Flash or data EEPROM data read.
© 2008 Microchip Technology Inc.
Preliminary
DS41364A-page 323