PIC16F193X Datasheet, PDF (360/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F193X/LF193X
28.1 DC Characteristics: PIC16F193X/LF193X-I/E (Industrial, Extended)
PIC16LF193X
PIC16F193X
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ TA ≤ +125°C for extended
Standard Operating Conditions (unless otherwise stated)
Operating temperature
-40°C ≤ TA ≤ +85°C for industrial
-40°C ≤ TA ≤ +125°C for extended
Param. Sym.
No.
Characteristic
Min. Typ† Max. Units
Conditions
D001 VDD
D001
D002* VDR
Supply Voltage
PIC16LF193X 1.8
—
3.6
V FOSC ≤ 16 MHz:
2.3
—
3.6
V FOSC ≤ 32 MHz (NOTE 2)
PIC16F193X 1.8
—
5.5
V FOSC ≤ 16 MHz:
2.3
—
5.5
V FOSC ≤ 32 MHz (NOTE 2)
RAM Data Retention Voltage⁽¹⁾
PIC16LF193X 1.5 —
—
V Device in Sleep mode
D002*
PIC16F193X 1.7 —
—
V Device in Sleep mode
VPOR*
Power-on Reset Release Voltage
— 1.6 —
V
VPORR* Power-on Reset Rearm Voltage
PIC16LF193X — 0.8 —
V Device in Sleep mode
PIC16F193X — 1.7 —
V Device in Sleep mode
VADFVR
Fixed Voltage Reference Voltage for
ADC (calibrated)
0.984
0.974
1.968
1.938
3.966
3.936
1.024
2.048
4.096
1.064
1.064
2.158
2.148
4.226
4.226
V FVRV = 00 (1x), VDD ≥ 2.5V
125°C
FVRV = 01 (2x), VDD ≥ 2.5V
125°C
FVRV = 10 (4x), VDD ≥ 4.75V
125°C
VCDAFVR
Fixed Voltage Reference Voltage for
Comparator and DAC
0.984
0.974
1.968
1.938
3.966
3.936
1.024
2.048
4.096
1.064
1.064
2.158
2.148
4.226
4.226
V FVRV = 00 (1x), VDD ≥ 2.5V
125°C
FVRV = 01 (2x), VDD ≥ 2.5V
125°C
FVRV = 10 (4x), VDD ≥ 4.75V
125°C
VFVR_REF Fixed Voltage Reference Voltage for 0.984 1.024 1.064
LCD Bias
0.974
1.064
V FVRV = 00 (1x), VDD ≥ 2.5V
125°C
D004* SVDD
VDD Rise Rate to ensure internal
Power-on Reset signal
0.05 —
— V/ms See Section 3.2 “Power-on Reset
(POR)” for details.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
2: PLL required for 32 MHz operation.
DS41364A-page 358
Preliminary
© 2008 Microchip Technology Inc.