PIC16F193X Datasheet, PDF (59/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F193X/LF193X
3.0 RESETS
The PIC16F193X/LF193X differentiates between
various kinds of Reset:
a) Power-on Reset (POR)
b) WDT Reset during normal operation
c) MCLR Reset
d) Brown-out Reset (BOR)
e) RESET instruction
f) Stack Overflow
g) Stack Underflow
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset (POR)
• MCLR Reset
• WDT Reset
• Brown-out Reset (BOR)
Most registers are not affected by a WDT wake-up
since this is viewed as the resumption of normal
operation. TO and PD bits are set or cleared differently
in different Reset situations, as indicated in Table 3-6.
These bits are used in software to determine the nature
of the Reset.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 3-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 28.0 “Electrical
Specifications” for pulse width specifications.
FIGURE 3-1:
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
RESET
Instruction
Stack
Pointer
Stack Full/Underflow Reset
MCLR
External Reset
MCLRE
Sleep
WDT
Time-out
VDD
OSC1
VDD Rise POR Pulse
Detect
Brown-out
Reset
BOR
Enable
OST/PWRT
OST^{(2) 1024 Cycles}
10-bit Ripple Counter
S
Chip_Reset
R
Q
LFINTOSC
PWRT⁽²⁾ 64 ms
11-bit Ripple Counter
Note 1: See Table 3-5 for time-out situations.
2: PWRT and OST counters are reset by POR and BOR.
Enable PWRT
Enable OST⁽¹⁾
© 2008 Microchip Technology Inc.
Preliminary
DS41364A-page 57