PIC16F193X Datasheet, PDF (224/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F193X/LF193X
20.2 Clock Accuracy with
Asynchronous Operation
The factory calibrates the internal oscillator block out-
put (INTOSC). However, the INTOSC frequency may
drift as VDD or temperature changes, and this directly
affects the asynchronous baud rate. Two methods may
be used to adjust the baud rate clock, but both require
a reference clock source of some kind.
The first (preferred) method uses the OSCTUNE
register to adjust the INTOSC output. Adjusting the
value in the OSCTUNE register allows for fine resolution
changes to the system clock source. See Section 8.5
“Internal Clock Modes” for more information.
The other method adjusts the value in the Baud Rate
Generator. This can be done automatically with the
Auto-Baud Detect feature (see Section 20.3.1
“Auto-Baud Detect”). There may not be fine enough
resolution when adjusting the Baud Rate Generator to
compensate for a gradual change in the peripheral
clock frequency.
REGISTER 20-1: TXSTA: TRANSMIT STATUS AND CONTROL REGISTER
R/W-/0
CSRC
bit 7
R/W-0/0
TX9
R/W-0/0
TXEN⁽¹⁾
R/W-0/0
SYNC
R/W-0/0
SENDB
R/W-0/0
BRGH
R-1/1
TRMT
R/W-0/0
TX9D
bit 0
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
bit 7
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care
Synchronous mode:
1 = Master mode (clock generated internally from BRG)
0 = Slave mode (clock from external source)
bit 6
TX9: 9-bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
bit 5
TXEN: Transmit Enable bit⁽¹⁾
1 = Transmit enabled
0 = Transmit disabled
bit 4
SYNC: EUSART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
bit 3
SENDB: Send Break Character bit
Asynchronous mode:
1 = Send Sync Break on next transmission (cleared by hardware upon completion)
0 = Sync Break transmission completed
Synchronous mode:
Don’t care
bit 2
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode
bit 1
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
bit 0
TX9D: Ninth bit of Transmit Data
Can be address/data bit or a parity bit.
Note 1: SREN/CREN overrides TXEN in Sync mode.
DS41364A-page 222
Preliminary
© 2008 Microchip Technology Inc.