PIC16F193X Datasheet, PDF (412/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

PIC16F193X/LF193X
PSTRxCON (Pulse Steering Control) ....................... 208
PWMxCON (Enhanced PWM Control) ..................... 207
RCSTA (Receive Status and Control)....................... 223
Special Function, Summary ........................................ 35
SRCON0 (SR Latch Control 0) ................................. 122
SRCON1 (SR Latch Control 1) ................................. 123
SSPADD (MSSP Address and Baud Rate,
I²C Mode).......................................................... 280
SSPCON1 (MSSP Control 1).................................... 277
SSPCON2 (SSP Control 2)....................................... 278
SSPCON3 (SSP Control 3)....................................... 279
SSPMSK (SSP Mask) ............................................... 280
SSPSTAT (SSP Status) ............................................ 276
STATUS ...................................................................... 50
T1CON (Timer1 Control)........................................... 169
T1GCON (Timer1 Gate Control) ............................... 170
TRISA (Tri-State PORTA) ........................................... 86
TRISB (Tri-State PORTB) ........................................... 91
TRISC (Tri-State PORTC) .......................................... 94
TRISD (Tri-State PORTD) .......................................... 97
TRISE (Tri-State PORTE) ......................................... 101
TxCON ...................................................................... 175
TXSTA (Transmit Status and Control) ...................... 222
WDTCON (Watchdog Timer Control).......................... 61
WPUB (Weak Pull-up PORTB) ................................... 90
RESET .............................................................................. 347
Reset................................................................................... 57
Reset Instruction ................................................................. 64
Resets ................................................................................. 57
Associated Registers .................................................. 68
Revision History ................................................................ 403
S
SCK................................................................................... 281
SDI .................................................................................... 281
SDO .................................................................................. 281
Serial Clock, SCK.............................................................. 281
Serial Data In (SDI) ........................................................... 281
Serial Data Out (SDO) ...................................................... 281
Shoot-through Current ...................................................... 206
Slave Select (SS) .............................................................. 281
Software Simulator (MPLAB SIM)..................................... 352
SPBRG.............................................................................. 225
SPBRG Register ........................................................... 37, 38
SPBRGH ........................................................................... 225
Special Event Trigger........................................................ 135
Special Function Registers (SFRs) ..................................... 35
SPI Mode (MSSP)
Associated Registers ................................................ 286
Serial Clock ............................................................... 281
Serial Data In ............................................................ 281
Serial Data Out ......................................................... 281
Slave Select .............................................................. 281
SPI Clock .................................................................. 283
Typical Connection ................................................... 282
SR Latch ........................................................................... 121
SRCON0 Register............................................................. 122
SRCON1 Register............................................................. 123
SS ..................................................................................... 281
SSPADD Register ....................................................... 39, 280
SSPBUF Register ............................................................... 39
SSPCON 1 Register.......................................................... 277
SSPCON Register............................................................... 39
SSPCON2 Register........................................................... 278
SSPCON3 Register........................................................... 279
SSPMSK Register............................................................. 280
SSPOV ............................................................................. 312
SSPOV Status Flag .......................................................... 312
SSPSTAT Register ..................................................... 39, 276
R/W Bit ..................................................................... 291
Stack................................................................................... 52
Accessing ................................................................... 53
Reset .......................................................................... 53
Stack Overflow/Underflow .................................................. 64
STATUS Register ............................................................... 50
SUBWFB .......................................................................... 349
T
T1CON Register ......................................................... 35, 169
T1GCON Register ............................................................ 170
T2CON Register ........................................................... 35, 43
Thermal Considerations.................................................... 368
Timer0............................................................................... 157
Associated Registers ................................................ 159
Operation .................................................................. 157
Specifications ........................................................... 376
Timer1............................................................................... 161
Associated registers ................................................. 171
Asynchronous Counter Mode ................................... 163
Reading and Writing ......................................... 163
Clock Source Selection............................................. 162
Interrupt .................................................................... 165
Operation .................................................................. 162
Operation During Sleep ............................................ 165
Oscillator................................................................... 163
Prescaler .................................................................. 163
Specifications ........................................................... 376
Timer1 Gate
Selecting Source .............................................. 163
TMR1H Register ....................................................... 161
TMR1L Register........................................................ 161
Timer2
Associated registers ................................................. 176
Timer2/4/6......................................................................... 173
Associated registers ................................................. 176
Timers
Timer1
T1CON ............................................................. 169
T1GCON........................................................... 170
Timer2/4/6
TxCON.............................................................. 175
Timing Diagrams
A/D Conversion......................................................... 378
A/D Conversion (Sleep Mode) .................................. 379
Acknowledge Sequence ........................................... 314
Asynchronous Reception.......................................... 220
Asynchronous Transmission..................................... 216
Asynchronous Transmission (Back to Back) ............ 216
Auto Wake-up Bit (WUE) During Normal Operation . 232
Auto Wake-up Bit (WUE) During Sleep .................... 232
Automatic Baud Rate Calibration.............................. 230
Baud Rate Generator with Clock Arbitration............. 307
BRG Reset Due to SDA Arbitration During
Start Condition.................................................. 317
Brown-out Reset (BOR)............................................ 374
Brown-out Reset Situations ........................................ 62
Bus Collision During a Repeated Start Condition
(Case 1)........................................................... 318
Bus Collision During a Repeated Start Condition
(Case 2)........................................................... 318
Bus Collision During a Start Condition (SCL = 0) ..... 317
Bus Collision During a Stop Condition (Case 1) ....... 319
DS41364A-page 410
Preliminary
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