PIC16F193X Datasheet, PDF(183/418 Page) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

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PIC16F193X Datasheet, PDF (183/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

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PIC16F193X/LF193X

REGISTER 18-2: CPSCON1: CAPACITIVE SENSING CONTROL REGISTER 1

U-0

â

bit 7

U-0

U-0

R/W-0/0(1, 2) R/W-0/0(1)

R/W-0/0

R/W-0/0

â

â

CPSCH4 CPSCH3

CPSCH2

CPSCH1

R/W-0/0

CPSCH0

bit 0

Legend:

R = Readable bit

u = bit is unchanged

â1â = Bit is set

W = Writable bit

x = Bit is unknown

â0â = Bit is cleared

U = Unimplemented bit, read as â0â

-n/n = Value at POR and BOR/Value at all other Resets

bit 7-4

bit 3-0

Unimplemented: Read as â0â

CPSCH<3:0>: Capacitive Sensing Channel Select bits

If CPSON = 0:

These bits are ignored. No channel is selected.

If CPSON = 1:

0000 = channel 0, (CPS0)

0001 = channel 1, (CPS1)

0010 = channel 2, (CPS2)

0011 = channel 3, (CPS3)

0100 = channel 4, (CPS4)

0101 = channel 5, (CPS5)

0110 = channel 6, (CPS6)

0111 =

1000 =

1001 =

1010 =

1011 =

1100 =

1101 =

1110 =

1111 =

channel 7, (CPS7)

channel 8, (CPS8(1))

channel 9, (CPS9(1))

channel 10, (CPS10(1))

channel 11, (CPS11(1))

channel 12, (CPS12(1))

channel 13, (CPS13(1))

channel 14, (CPS14(1))

channel 15, (CPS15(1))

Note 1: These channels are not implemented on the PIC16F1933/1936/1938/PIC16LF1933/1936/1938.

2: This bit is not implemented on PIC16F1933/1936/1938/PIC16LF1933/1936/1938, read as â0â

TABLE 18-2: SUMMARY OF REGISTERS ASSOCIATED WITH CAPACITIVE SENSING

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Register

on Page

ANSELA

â

â

ANSA5 ANSA4 ANSA3 ANSA2 ANSA1 ANSA0

86

ANSELB

â

â

ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0

91

ANSELD

ANSD7 ANSD6 ANSD5 ANSD4 ANSD3 ANSD2 ANSD1 ANSD0

97

INTCON

GIE

PEIE

TMR0IE

INTE

IOCIE TMR0IF

INTF

IOCIF

73

OPTION_REG WPUEN INTEDG TMR0CS TMR0SE

PSA

PS2

PS1

PS0

51

PIE1

TMR1GIE ADIE

RCIE

TXIE

SSPIE CCP1IE TMR2IE TMR1IE

74

PIR1

TMR1GIF ADIF

RCIF

TXIF

SSPIF CCP1IF TMR2IF TMR1IF

77

T1CON

TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC

â

TMR1ON

169

TxCON

â

TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMRXON TXCKPS1 TXCKPS0

175

TRISA

TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0

86

TRISB

TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0

91

TRISD

TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0

97

Legend: - = Unimplemented locations, read as â0â, u = unchanged, x = unknown. Shaded cells are not used by the capacitive

sensing module.

Â© 2008 Microchip Technology Inc.

Preliminary

DS41364A-page 181

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