PIC16F193X Datasheet, PDF (189/418 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology

19.3 Capture Mode
In Capture mode, the CCPRxH, CCPRxL register pair
captures the 16-bit value of the TMR1 register when an
event occurs on pin CCPx. An event is defined as one
of the following and is configured by the CCPxM<3:0>
bits of the CCPxCON register:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the Interrupt Request Flag bit
CCPxIF of the PIRx register is set. The interrupt flag
must be cleared in software. If another capture occurs
before the value in the CCPRxH, CCPRxL register pair
is read, the old captured value is overwritten by the new
captured value (see Figure 19-1).
19.3.1 CCPX PIN CONFIGURATION
In Capture mode, the CCPx pin should be configured
as an input by setting the associated TRIS control bit.
Also, the CCPx pin function can be moved to
alternative pins using the APFCON register. Refer to
Section 6.1 “Alternate Pin Function” for more
details.
Note:
If the CCPx pin is configured as an output,
a write to the port can cause a capture
condition.
FIGURE 19-1:
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
CCPx
pin
Set Flag bit CCPxIF
Prescaler ^{(PIRx register)}
÷ 1, 4, 16
CCPRxH
CCPRxL
and
Edge Detect
Capture
Enable
CCPxCON<3:0>
System Clock (FOSC)
TMR1H
TMR1L
PIC16F193X/LF193X
19.3.2 TIMER1 MODE SELECTION
Timer1 must be running in Timer mode or Synchronized
Counter mode for the CCP module to use the capture
feature. In Asynchronous Counter mode, the capture
operation may not work.
19.3.3 SOFTWARE INTERRUPT MODE
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep the
CCPxIE interrupt enable bit of the PIEx register clear to
avoid false interrupts. Additionally, the user should
clear the CCPxIF interrupt flag bit of the PIRx register
following any change in Operating mode.
Note:
Clocking Timer1 from the system clock
(FOSC) should not be used in Capture
mode. In order for Capture mode to
recognize the trigger event on the CCPx
pin, TImer1 must be clocked from the
instruction clock (FOSC/4) or from an
external clock source.
19.3.4 CCP PRESCALER
There are four prescaler settings specified by the
CCPxM<3:0> bits of the CCPxCON register. Whenever
the CCP module is turned off, or the CCP module is not
in Capture mode, the prescaler counter is cleared. Any
Reset will clear the prescaler counter.
Switching from one capture prescaler to another does not
clear the prescaler and may generate a false interrupt. To
avoid this unexpected operation, turn the module off by
clearing the CCPxCON register before changing the
prescaler (see Example 19-1).
EXAMPLE 19-1: CHANGING BETWEEN
CAPTURE PRESCALERS
BANKSEL CCP1CON ;Set Bank bits to point
;to CCP1CON
CLRF CCP1CON ;Turn CCP module off
MOVLW NEW_CAPT_PS ;Load the W reg with
;the new prescaler
;move value and CCP ON
MOVWF CCP1CON ;Load CCP1CON with this
;value
19.3.5 CAPTURE DURING SLEEP
Capture mode depends upon the Timer1 module for
proper operation. There are two options for driving the
Timer1 module in Capture mode. It can be driven by the
instruction clock (FOSC/4), or by an external clock source.
If Timer1 is clocked by FOSC/4, then Timer1 will not
increment during Sleep. When the device wakes from
Sleep, Timer1 will continue from its previous state.
If Timer1 is clocked by an external clock source, then
Capture mode will operate as defined in Section 19.1
“Capture/Compare/PWM”.
© 2008 Microchip Technology Inc.
Preliminary
DS41364A-page 187