82371FB Datasheet, PDF (88/122 Pages) Intel Corporation – 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR

82371FB (PIIX) AND 82371SB (PIIX3)
E
Table 10. Behavior During Resume When Host Not In Global Suspend State
Adjacent Port Response
Port Status and
Signaling Type
Signaled Port Response
Enabled Port Disabled
Port
Suspended
Port
Port disabled and connect PORTSC Connect Status and No Effect
received
Connect Status Change bits are
set.
No Effect No Effect
Table 11. Behavior During Resume when Host is in Global Suspend State
Adjacent Port Response
Port Status and
Signaling Type
Signaled Port Response
Enabled
Port
Disabled Suspended
Port
Port
Port enabled, Resume
K-State received
Resume reflected downstream on Signal
No Effect
signaled port. Resume Detect
resume
Status bit in USBSTS Reg is set. downstream
No Effect
Port disabled, resume
K-State received
No Effect
No Effect
No Effect
No Effect
Port suspended, Resume
K-State received
Resume signal reflected
downstream on signaled port.
Resume Detect status bit in
PORTSC and USBSTS Regs are
set.
Signal
resume
downstream
No Effect
No Effect
Port enabled, disabled or
suspended and
disconnect received
Resume Detect status bit in
USBSTS Reg is set. PORTSC
Connect and Enable status bits
are cleared and Connect Change
and Enable/Disable Change bits
are set.
Signal
resume
downstream
No Effect
No Effect
Port disabled and connect Resume Detect status bit in
received
USBSTS Reg is set. PORTSC
Connect status bit and Connect
Change status bit are set.
Signal
No Effect
resume
downstream
No Effect
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