82371FB Datasheet, PDF (41/122 Pages) Intel Corporation – 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR

E
82371FB (PIIX) AND 82371SB (PIIX3)
address to be decoded and the PCS# signal asserted. The PCS# signal is never asserted for ISA bus
masters access.
Bit
Description
15:2
PCS Address (PCSADDR). This field defines a 16-bit I/O space address (4 byte range) that
causes the PCS# signal to assert. Address bits [3:2] may be masked (considered "don’t care")
by programming bits [1:0] of this register.
1:0
PCS Address Mask. When bit 1=1, PCSADDR3 is masked. When bit 0=1, PCSADDR2 is
masked.
Bits[1:0]
00
01
10
11
Range
4 bytes (default)
8 bytes, contiguous
Disabled
16 bytes, contiguous
2.2.16. APICBASE—APIC BASE ADDRESS RELOCATION REGISTER (Function 0) (PIIX3 Only)
Address Offset:
Default Value:
Attribute:
80h
00h
Read/Write
This register provides the modifier for the APIC base address. APIC is mapped in the memory space at the
locations FEC0_xy00h and FEC0_xy10h (x=0-Fh, y=0,4,8,Ch). The value of ’y’ is defined by bits [1,0] and the
value of ’x’ is defined by bits [5:2]. Thus, the relocation register provides 1-Kbyte address granularity (i.e.,
potentially up to 64 IOAPICs can be uniformly addresses in the memory space). The default value of 00h
provides mapping of the IOAPIC unit at the addresses FEC0_0000h and FEC0_0010h.
Bit
Description
7
Reserved.
6
A12 Mask. This bit determines selects whether APICCS# is generated for one or two IOAPIC
address ranges. When bit 6=1, address bit 12 is ignored allowing the APICCS# signal to be
generated for two consecutive IOAPIC address ranges. External logic is needed to select
individual IOAPICs by combining SA12 and APICCS#. For example, when bit 6=1 (and x and
y = 0), APICCS# is generated for addresses FEC0_0000h, FEC0_0010, as well as
FEC0_1000h, FEC0_1010. When bit 6=0, APICCS# is generated for one IOAPIC address
range.
5:2
X-Base Address. Bits[5:2] are compared with PCI address bits AD[15:12], respectively.
1:0
Y-Base Address. Bits[1:0] are compared with PCI address bits AD[11:10], respectively.
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