82371FB Datasheet, PDF (57/122 Pages) Intel Corporation – 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR

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82371FB (PIIX) AND 82371SB (PIIX3)
2.4.8. HEDTHEADER TYPE REGISTER (Function 2) (PIIX3)
Address Offset:
Default Value:
Attribute:
0Eh
00h
Read Only
This register identifies the Serial Bus module as a single function device.
Bit
Description
7:0
Device Type (DEVICET). 00. Multi-function device capability for PIIX/PIIX3 is defined by the
HEDT register in Function 0.
2.4.9.
BASEADDI/O SPACE BASE ADDRESS (Function 2) (PIIX3)
Address Offset:
Default Value:
Attribute:
20−23h
00h
Read/Write
This register contains the base address of the USB I/O Registers.
Bit
31:16
15:5
4:1
0
Description
Reserved. Hardwired to 0s. Must be written as 0s.
Index Register Base Address. Bits [15:5] correspond to I/O address signals AD [15:5],
respectively.
Reserved. Read as 0.
Resource Type Indicator (RTE)—RO. This bit is hardwired to 1 indicating that the base
address field in this register maps to I/O space.
2.4.10. ILInterrupt Line Register (Function 2) (PIIX3)
Address Offset:
Default Value:
Attribute:
3Ch
00h
Read/Write
Software programs this register with interrupt information concerning the Universal Serial Bus.
Bit
Description
7:0
Interrupt Line. . The value in this register has no affect on PIIX3 hardware operations.
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