82371FB Datasheet, PDF (25/122 Pages) Intel Corporation – 82371FB (PIIX) AND 82371SB (PIIX3) PCI ISA IDE XCELERATOR

E
82371FB (PIIX) AND 82371SB (PIIX3)
Configuration
Offset
ACh
ADh
AEh
AF–FFh
Mnemonic
CTLTMR
—
CTHTMR
—
Register
Clock Scale STPCLK# Low Timer
Reserved
Clock Scale STPCLK# High Timer
Reserved
Table 3. PCI Configuration Registers—Function 1 (IDE Interface)
Configuration
Offset
Mnemonic
Register
00–01h
VID
Vendor Identification
02–03h
DID
Device Identification
04–05h
PCICMD
Command
06–07h
PCISTS
PCI Device Status
08h
RID
Revision Identification
09−0Bh
CLASSC
Class Code
0Ch
—
Reserved
0Dh
MLT
Master Latency Timer
0Eh
HEDT
Header Type
0F–1Fh
—
Reserved
20–23h
BMIBA
Bus Master Interface Base Address
24–3Fh
—
Reserved
40–43h
IDETIM
IDE Timing Modes
44h
—
Reserved (PIIX)
SIDETIM
Slave IDE Timing Modes (PIIX3)
45–FFh
—
Reserved
Register
Access
R/W
—
R/W
—
Register
Access
RO
RO
R/W
R/WC
RO
RO
—
R/W
RO
—
R/W
—
R/W
—
R/W
—
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