GS4901B_09 Datasheet, PDF (5/102 Pages) Gennum Corporation – SD Clock and Timing Generator with GENLOCK

3.10 GSPI Host Interface ..................................................................................................................... 64
3.10.1 Command Word Description ...................................................................................... 66
3.10.2 Data Read and Write Timing ....................................................................................... 66
3.10.3 Configuration and Status Registers........................................................................... 67
3.11 JTAG ................................................................................................................................................. 93
3.12 Device Power-Up ........................................................................................................................ 94
3.12.1 Power Supply Sequencing ........................................................................................... 94
3.13 Device Reset .................................................................................................................................. 94
4. Application Reference Design ............................................................................................................... 95
4.1 GS4901B Typical Application Circuit ..................................................................................... 95
4.2 GS4900B Typical Application Circuit ..................................................................................... 96
5. References & Relevant Standards ......................................................................................................... 97
6. Package & Ordering Information .......................................................................................................... 98
6.1 Package Dimensions ..................................................................................................................... 98
6.2 Recommended PCB Footprint ................................................................................................... 99
6.3 Packaging Data ............................................................................................................................... 99
6.4 Ordering Information ................................................................................................................. 100
7. Revision History........................................................................................................................................ 101
List of Figures
GS4901B Functional Block Diagram ......................................................................................................... 2
GS4900B Functional Block Diagram ......................................................................................................... 3
Figure 1-1: XTAL1 and XTAL2 Reference Circuits .............................................................................. 18
Figure 2-1: PCLK to TIMING_OUT Signal Output Timing ................................................................. 32
Figure 2-2: Maximum Pb-free Solder Reflow Profile (preferred) .................................................. 34
Figure 2-3: Standard Pb Solder Reflow Profile .................................................................................... 34
Figure 3-1: SD-HD Calculation .................................................................................................................. 38
Figure 3-2: Output Accuracy and Modes of Operation ..................................................................... 40
Figure 3-3: Example HSYNC, VSYNC, and FSYNC Analog Input Timing from a
Sync Separator ................................................................................................................................................ 41
Figure 3-4: Example H Blanking, V Blanking, and F Digital Input Timing from an
SDI Deserializer .............................................................................................................................................. 41
Figure 3-5: 10FID Input Timing ................................................................................................................. 42
Figure 3-6: Default 10FID Output Timing .............................................................................................. 58
Figure 3-7: Optional 10FID Output Timing ........................................................................................... 59
Figure 3-8: AFS Output Timing ................................................................................................................. 60
Figure 3-9: USER Programmable Output Signal .................................................................................. 61
Figure 3-10: Audio Clock Block Diagram for HD Demux Operation ........................................... 64
Figure 3-11: GSPI Application Interface Connection ........................................................................ 65
Figure 3-12: Command Word Format ..................................................................................................... 66
Figure 3-13: Data Word Format ................................................................................................................ 66
Figure 3-14: GSPI Read Mode Timing ..................................................................................................... 67
Figure 3-15: GSPI Write Mode Timing .................................................................................................... 67
Figure 3-16: In-Circuit JTAG ...................................................................................................................... 93
Figure 3-17: System JTAG ........................................................................................................................... 94
GS4901B/GS4900B SD Clock and Timing Generator
with GENLOCK
Data Sheet
37703 - 4
December 2009
5 of 102