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GS4901B_09 Datasheet, PDF (19/102 Pages) Gennum Corporation – SD Clock and Timing Generator with GENLOCK
1.4 Pre-Programmed Recognized Video Standards
Table 1-2 describes the video standards recognized by the GS4901B/GS4900B. The
device will automatically recognize VID_STD[5:0] = 1 to 10. In order to enable the device
to recognize and lock to any of the HD reference formats defined by VID_STD[5:0] = 11
to 38, the user must set the corresponding bit LOW in the Reference_Standard_Disable
register, located at address 11h-13h of the host interface. In addition, the user must set
the HD_Reference_Enable bit of register 82h[7] HIGH.
Please see the descriptions of the Reference_Standard_Disable and
HD_Reference_Enable registers in Section 3.10.3 on page 67.
If an HD reference format is left disabled in the Reference_Standard_Disable register, or
if the HD_Reference_Enable bit is not set HIGH in register 82h, the device will NOT
recognize this format should it be applied to the input of the device.
The user may select VID_STD[5:0] = 1 or 3-10 ONLY as output formats.
If desired, the external VID_STD[5:0] pins may be ignored by setting bit 1 of the
Video_Control register, and the video standard may instead be selected via the
VID_STD[5:0] register of the host interface (see Section 3.10.3 on page 67). Although the
external VID_STD[5:0] pins will be ignored in this case, they should not be left floating.
NOTE: VID_STD[5:4] should always be set LOW by the application layer since these pins
are not required to select output video standards 1 to 10.
GS4901B/GS4900B SD Clock and Timing Generator
with GENLOCK
Data Sheet
37703 - 4
December 2009
19 of 102