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S912XEP100J5MAG Datasheet, PDF (947/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members. | |||
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Chapter 25 256 KByte Flash Module (S12XFTM256K2V1)
⢠Program a duplicate DFPART to the EEE nonvolatile information register at global address
0x12_0002 (see Table 25-7)
⢠Program ERPART to the EEE nonvolatile information register at global address 0x12_0004 (see
Table 25-7)
⢠Program a duplicate ERPART to the EEE nonvolatile information register at global address
0x12_0006 (see Table 25-7)
The D-Flash user partition will start at global address 0x10_0000. The buffer RAM EEE partition will end
at global address 0x13_FFFF. After the Partition D-Flash operation has completed, the CCIF ï¬ag will set.
Running the Partition D-Flash command a second time will result in the ACCERR bit within the FSTAT
register being set. The data value written corresponds to the number of 256 byte sectors allocated for either
direct D-Flash access (DFPART) or buffer RAM EEE access (ERPART).
Table 25-78. Partition D-Flash Command Error Handling
Register
FSTAT
FERSTAT
Error Bit
ACCERR
FPVIOL
MGSTAT1
MGSTAT0
EPVIOLIF
Error Condition
Set if CCOBIX[2:0] != 010 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see Table 25-30)
Set if partitions have already been deï¬ned
Set if an invalid DFPART or ERPART selection is supplied
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
None
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
947
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