S912XEP100J5MAG Datasheet, PDF (455/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.

Chapter 10 XGATE (S12XGATEV3)
SUBL
Subtract Immediate 8 bit Constant
(Low Byte)
SUBL
Operation
RD – $00:IMM8 ⇒ RD
Subtracts an immediate 8 bit constant from the content of register RD using binary subtraction and stores
the result in the destination register RD.
CCR Effects
NZVC
∆∆∆∆
N: Set if bit 15 of the result is set; cleared otherwise.
Z: Set if the result is $0000; cleared otherwise.
V: Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise.
RD[15]_old & RD[15]_new
C: Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]_old & RD[15]_new
Code and CPU Cycles
Source Form
SUBL RD, #IMM8
Address
Mode
IMM8
11000
Machine Code
RD
IMM8
Cycles
P
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
455