S912XEP100J5MAG Datasheet, PDF (359/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.

Chapter 10 XGATE (S12XGATEV3)
10.3.1.1 XGATE Control Register (XGMCTL)
All module level switches and flags are located in the XGATE Module Control Register Figure 10-3.
Module Base +0x00000
15
14
13
12
11
10
9
8
7
6
5
4
3
2
R0
0
0
0
0
0
0
0
0
W _XGEM
XG
FRZM
XG
DBGM
XG
SSM
XG
FACTM
XG
SWEFM
XGIEM
XGE
XGFRZ XGDBG XGSS XGFACT
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-3. XGATE Control Register (XGMCTL)
Read: Anytime
Write: Anytime
1
0
XG
SWEF
XGIE
0
0
Table 10-2. XGMCTL Field Descriptions (Sheet 1 of 3)
Field
Description
15
XGEM
XGE Mask — This bit controls the write access to the XGE bit. The XGE bit can only be set or cleared if a "1" is
written to the XGEM bit in the same register access.
Read:
This bit will always read "0".
Write:
0 Disable write access to the XGE in the same bus cycle
1 Enable write access to the XGE in the same bus cycle
14
XGFRZM
XGFRZ Mask — This bit controls the write access to the XGFRZ bit. The XGFRZ bit can only be set or cleared
if a "1" is written to the XGFRZM bit in the same register access.
Read:
This bit will always read "0".
Write:
0 Disable write access to the XGFRZ in the same bus cycle
1 Enable write access to the XGFRZ in the same bus cycle
13
XGDBGM
XGDBG Mask — This bit controls the write access to the XGDBG bit. The XGDBG bit can only be set or cleared
if a "1" is written to the XGDBGM bit in the same register access.
Read:
This bit will always read "0".
Write:
0 Disable write access to the XGDBG in the same bus cycle
1 Enable write access to the XGDBG in the same bus cycle
12
XGSSM
XGSS Mask — This bit controls the write access to the XGSS bit. The XGSS bit can only be set or cleared if a
"1" is written to the XGSSM bit in the same register access.
Read:
This bit will always read "0".
Write:
0 Disable write access to the XGSS in the same bus cycle
1 Enable write access to the XGSS in the same bus cycle
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
359