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S912XEP100J5MAG Datasheet, PDF (265/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members. | |||
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Chapter 6 Interrupt (S12XINTV2)
6.3 Memory Map and Register Deï¬nition
This section provides a detailed description of all registers accessible in the XINT module.
6.3.1 Module Memory Map
Table 6-3 gives an overview over all XINT module registers.
Table 6-3. XINT Memory Map
Address
0x0120
0x0121
0x0122â0x0125
0x0126
0x0127
0x0128
0x0129
0x012A
0x012B
0x012C
0x012D
0x012E
0x012F
Use
RESERVED
Interrupt Vector Base Register (IVBR)
RESERVED
XGATE Interrupt Priority Conï¬guration Register
(INT_XGPRIO)
Interrupt Request Conï¬guration Address Register
(INT_CFADDR)
Interrupt Request Conï¬guration Data Register 0
(INT_CFDATA0)
Interrupt Request Conï¬guration Data Register 1
(INT_CFDATA1)
Interrupt Request Conï¬guration Data Register 2
(INT_CFDATA2
Interrupt Request Conï¬guration Data Register 3
(INT_CFDATA3)
Interrupt Request Conï¬guration Data Register 4
(INT_CFDATA4)
Interrupt Request Conï¬guration Data Register 5
(INT_CFDATA5)
Interrupt Request Conï¬guration Data Register 6
(INT_CFDATA6)
Interrupt Request Conï¬guration Data Register 7
(INT_CFDATA7)
Access
â
R/W
â
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
265
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