S912XEP100J5MAG Datasheet, PDF (128/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.

Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.33 Port S Pull Device Enable Register (PERS)
Address 0x024C
R
W
Reset
7
PERS7
1
1. Read: Anytime.
Write: Anytime.
6
PERS6
5
PERS5
4
PERS4
3
PERS3
2
PERS2
Access: User read/write⁽¹⁾
1
0
PERS1
PERS0
1
1
1
1
1
1
1
Figure 2-31. Port S Pull Device Enable Register (PERS)
Table 2-30. PERS Register Field Descriptions
Field
7-0
PERS
Description
Port S pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull devices are enabled.
1 Pull device enabled.
0 Pull device disabled.
2.3.34 Port S Polarity Select Register (PPSS)
Address 0x024D
R
W
Reset
7
PPSS7
0
1. Read: Anytime.
Write: Anytime.
6
PPSS6
5
PPSS5
4
PPSS4
3
PPSS3
2
PPSS2
0
0
0
0
0
Figure 2-32. Port S Polarity Select Register (PPSS)
Access: User read/write⁽¹⁾
1
0
PPSS1
PPSS0
0
0
Table 2-31. PPSS Register Field Descriptions
Field
7-0
PPSS
Description
Port S pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
MC9S12XE-Family Reference Manual Rev. 1.25
128
Freescale Semiconductor