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S912XEP100J5MAG Datasheet, PDF (1235/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.
A.5 Output Loads
Appendix A Electrical Characteristics
A.5.1 Resistive Loads
The voltage regulator is intended to supply the internal logic and oscillator. It allows no external DC loads.
A.5.2 Capacitive Loads
The capacitive loads are specified in Table A-22. Ceramic capacitors with X7R dielectricum are required.
Table A-22. - Required Capacitive Loads
Num
Characteristic
1 VDD/VDDF external capacitive load
3 VDDPLL external capacitive load
Symbol
CDDext
CDDPLLext
Min Recommended Max Unit
176
220
264
nF
80
220
264
nF
A.5.3 Chip Power-up and Voltage Drops
LVI (low voltage interrupt), POR (power-on reset) and LVRs (low voltage reset) handle chip power-up or
drops of the supply voltage. Their function is shown in Figure A-3 .
Figure A-3. MC9S12XE-Family - Chip Power-up and Voltage Drops (not scaled)
V
VDDX
VLVID
VLVIA
VLVRXD
VLVRXA
VDD
VPORD
LVI
POR
LVRX
t
LVI enabled LVI disabled due to LVR
Freescale Semiconductor
MC9S12XE-Family Reference Manual Rev. 1.25
1235