S912XEP100J5MAG Datasheet, PDF (1124/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.

Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
Register
FSTAT
FERSTAT
Table 28-56. Verify Backdoor Access Key Command Error Handling
Error Bit
ACCERR
FPVIOL
MGSTAT1
MGSTAT0
EPVIOLIF
Error Condition
Set if CCOBIX[2:0] != 100 at command launch
Set if a Load Data Field command sequence is currently active
Set if an incorrect backdoor key is supplied
Set if backdoor key access has not been enabled (KEYEN[1:0] != 10, see
Section 28.3.2.2)
Set if the backdoor key has mismatched since the last reset
None
None
None
None
28.4.2.13 Set User Margin Level Command
The Set User Margin Level command causes the Memory Controller to set the margin level for future read
operations of a specific P-Flash or D-Flash block.
Table 28-57. Set User Margin Level Command FCCOB Requirements
CCOBIX[2:0]
000
001
0x0D
FCCOB Parameters
Global address [22:16] to identify the
Flash block
Margin level setting
Upon clearing CCIF to launch the Set User Margin Level command, the Memory Controller will set the
user margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set User Margin Level command are defined in Table 28-58.
Table 28-58. Valid Set User Margin Level Settings
CCOB
(CCOBIX=001)
Level Description
0x0000
Return to Normal Level
0x0001
User Margin-1 Level⁽¹⁾
0x0002
User Margin-0 Level⁽²⁾
1. Read margin to the erased state
2. Read margin to the programmed state
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MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor