S912XEP100J5MAG Datasheet, PDF(449/1324 Page) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.

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S912XEP100J5MAG Datasheet, PDF (449/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.

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SIF

Set Interrupt Flag

Chapter 10 XGATE (S12XGATEV3)

SIF

Operation

Sets the interrupt ï¬ag of an XGATE channel (XGIF). This instruction supports two source forms. If

inherent address mode is used, then the interrupt flag of the current channel (XGCHID) will be set. If the

monadic address form is used, the interrupt ï¬ag associated with the channel id number contained in

RS[6:0] is set. The content of RS[15:7] is ignored.

NOTE

Interrupt ï¬ags of reserved channels (see Device User Guide) canât be set.

CCR Effects

NZVC

ââââ

N: Not affected.

Z: Not affected.

V: Not affected.

C: Not affected.

Code and CPU Cycles

SIF

SIF RS

Source Form

Address

Mode

INH

MON

Machine Code

0000001100000000

0 0 0 0 0 RS 1 1 1 1 0 1 1 1

Cycles

PA

PA

MC9S12XE-Family Reference Manual Rev. 1.25

Freescale Semiconductor

449

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