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S912XEP100J5MAG Datasheet, PDF (1240/1324 Pages) Freescale Semiconductor, Inc – Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D-2. for the peripheral features that are available on the different family members.
Appendix A Electrical Characteristics
Defining the jitter as:
J(N)
=
⎛
max⎜
⎝
1
–
t-N-m-----⋅-a--t-nx----(o--N--m---)
,
1
–
-Nt--m---⋅--i-t-n-n---(-o-N---m--)-
⎞
⎟
⎠
The following equation is a good fit for the maximum jitter:
J(N)
=
---j-1---
N
+
j2
J(N)
1
5
10
20
N
Figure A-6. Maximum bus clock jitter approximation
1240
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor