MC908GZ60CFUE Datasheet, PDF (93/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Functional Description
OSCENINSTOP — Oscillator Enable In Stop Mode Bit
OSCENINSTOP, when set, will enable the oscillator to continue to generate clocks in stop mode. See
Chapter 4 Clock Generator Module (CGM). This function is used to keep the timebase running while
the rest of the MCU stops. See Chapter 17 Timebase Module (TBM). When clear, the oscillator will
cease to generate clocks while in stop mode. The default state for this option is clear, disabling the
oscillator in stop mode.
1 = Oscillator enabled during stop mode
0 = Oscillator disabled during stop mode (default)
SCIBDSRC — SCI Baud Rate Clock Source Bit
SCIBDSRC controls the clock source used for the serial communications interface (SCI). The setting
of this bit affects the frequency at which the SCI operates.See Chapter 14 Enhanced Serial
Communications Interface (ESCI) Module.
1 = Internal data bus clock used as clock source for SCI (default)
0 = External oscillator used as clock source for SCI
Address: $001F
Bit 7
6
5
4
3
2
1
Read:
COPRS
Write:
LVISTOP LVIRSTD LVIPWRD LVI5OR3
SSREC
STOP
Reset: 0
0
0
0
See note
0
0
Note: LVI5OR3 is only reset via POR (power-on reset).
Figure 5-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
COPRS — COP Rate Select Bit
COPRS selects the COP timeout period. Reset clears COPRS. See Chapter 6 Computer Operating
Properly (COP) Module
1 = COP timeout period = 8176 CGMXCLK cycles
0 = COP timeout period = 262,128 CGMXCLK cycles
LVISTOP — LVI Enable in Stop Mode Bit
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
LVIRSTD — LVI Reset Disable Bit
LVIRSTD disables the reset signal from the LVI module.
See Chapter 11 Low-Voltage Inhibit (LVI).
1 = LVI module resets disabled
0 = LVI module resets enabled
LVIPWRD — LVI Power Disable Bit
LVIPWRD disables the LVI module. See Chapter 11 Low-Voltage Inhibit (LVI).
1 = LVI module power disabled
0 = LVI module power enabled
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
93