MC908GZ60CFUE Datasheet, PDF (239/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Chapter 16
Serial Peripheral Interface (SPI) Module
16.1 Introduction
This section describes the serial peripheral interface (SPI) module, which allows full-duplex, synchronous,
serial communications with peripheral devices.
The text that follows describes the SPI. The SPI I/O pin names are SS (slave select), SPSCK (SPI serial
clock), MOSI (master out slave in), and MISO (master in/slave out). The SPI shares four I/O pins with four
parallel I/O ports.
16.2 Features
Features of the SPI module include:
• Full-duplex operation
• Master and slave modes
• Double-buffered operation with separate transmit and receive registers
• Four master mode frequencies (maximum = bus frequency ÷ 2)
• Maximum slave mode frequency = bus frequency
• Serial clock with programmable polarity and phase
• Two separately enabled interrupts:
– SPRF (SPI receiver full)
– SPTE (SPI transmitter empty)
• Mode fault error flag with CPU interrupt capability
• Overflow error flag with CPU interrupt capability
• Programmable wired-OR mode
• I/O (input/output) port bit(s) software configurable with pullup device(s) if configured as input port
bit(s)
16.3 Functional Description
The SPI module allows full-duplex, synchronous, serial communication between the MCU and peripheral
devices, including other MCUs. Software can poll the SPI status flags or SPI operation can be interrupt
driven.
If a port bit is configured for input, then an internal pullup device may be enabled for that port bit.
The following paragraphs describe the operation of the SPI module. Refer to Figure 16-3 for a summary
of the SPI I/O registers.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
239