MC908GZ60CFUE Datasheet, PDF (48/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Memory
2.6.3 FLASH-1 Block Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made for protecting blocks of memory from unintentional erase or program
operations due to system malfunction. This protection is done by using the FLASH-1 block protection
register (FL1BPR). FL1BPR determines the range of the FLASH-1 memory which is to be protected. The
range of the protected area starts from a location defined by FL1BPR and ends at the bottom of the
FLASH-1 memory ($FFFF). When the memory is protected, the HVEN bit can not be set in either ERASE
or PROGRAM operations.
NOTE
In performing a program or erase operation, the FLASH-1 block protect
register must be read after setting the PGM or ERASE bit and before
asserting the HVEN bit.
When the FLASH-1 block protect register is programmed with all 0’s, the entire memory is protected from
being programmed and erased. When all the bits are erased (all 1’s), the entire memory is accessible for
program and erase.
When bits within FL1BPR are programmed (0), they lock a block of memory address ranges as shown in
Figure 2-4. If FL1BPR is programmed with any value other than $FF, the protected block of FLASH
memory can not be erased or programmed.
NOTE
The vector locations and the FLASH block protect registers are located in
the same page. FL1BPR and FL2BPR are not protected with special
hardware or software. Therefore, if this page is not protected by FL1BPR
and the vector locations are erased by either a page or a mass erase
operation, then both FL1BPR and FL2BPR will also get erased.
2.6.4 FLASH-1 Mass Erase Operation
Use this step-by-step procedure to erase the entire FLASH-1 memory:
1. Set both the ERASE bit and the MASS bit in the FLASH-1 control register (FL1CR).
2. Read the FLASH-1 block protect register (FL1BPR).
NOTE
Mass erase is disabled whenever any block is protected (FL1BPR does not
equal $FF).
3. Write to any FLASH-1 address within the FLASH-1 array with any data.
4. Wait for a time, t_NVS (minimum 10 μs).
5. Set the HVEN bit.
6. Wait for a time, t_MERASE (minimum 4 ms).
7. Clear the ERASE and MASS bits.
8. Wait for a time, t_NVHL (minimum 100 μs).
9. Clear the HVEN bit.
10. Wait for a time, t_RCV, (typically 1 μs) after which the memory can be accessed in normal read mode.
NOTES
A. Programming and erasing of FLASH locations can not be performed by code being executed from the
same FLASH array.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
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