MC908GZ60CFUE Datasheet, PDF (157/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08

Programmer’s Model of Control Registers
SFTRES — Soft Reset
When this bit is set by the CPU, the MSCAN08 immediately enters the soft reset state. Any ongoing
transmission or reception is aborted and synchronization to the bus is lost.
The following registers enter and stay in their hard reset state:
CMCR0, CRFLG, CRIER, CTFLG, and CTCR.
The registers CMCR1, CBTR0, CBTR1, CIDAC, CIDAR0–CIDAR3, and CIDMR0–CIDMR3 can only
be written by the CPU when the MSCAN08 is in soft reset state. The values of the error counters are
not affected by soft reset.
When this bit is cleared by the CPU, the MSCAN08 tries to synchronize to the CAN bus. If the
MSCAN08 is not in bus-off state, it will be synchronized after 11 recessive bits on the bus; if the
MSCAN08 is in bus-off state, it continues to wait for 128 occurrences of 11 recessive bits.
Clearing SFTRES and writing to other bits in CMCR0 must be in separate instructions.
1 = MSCAN08 in soft reset state
0 = Normal operation
12.13.2 MSCAN08 Module Control Register 1
Address:
Read:
Write:
Reset:
$0501
Bit 7
6
5
4
3
2
1
0
0
0
0
0
LOOPB WUPM
0
0
0
0
0
0
0
= Unimplemented
Figure 12-17. Module Control Register (CMCR1)
Bit 0
CLKSRC
0
LOOPB — Loop Back Self-Test Mode
When this bit is set, the MSCAN08 performs an internal loop back which can be used for self-test
operation: the bit stream output of the transmitter is fed back to the receiver internally. The CAN_RX
input pin is ignored and the CAN_TX output goes to the recessive state (1). The MSCAN08 behaves as
it does normally when transmitting and treats its own transmitted message as a message received
from a remote node. In this state the MSCAN08 ignores the bit sent during the ACK slot of the CAN
frame Acknowledge field to insure proper reception of its own message. Both transmit and receive
interrupts are generated.
1 = Activate loop back self-test mode
0 = Normal operation
WUPM — Wakeup Mode
This flag defines whether the integrated low-pass filter is applied to protect the MSCAN08 from
spurious wakeups (see 12.8.5 Programmable Wakeup Function).
1 = MSCAN08 will wakeup the CPU only in cases of a dominant pulse on the bus which has a length
of at least t_wup.
0 = MSCAN08 will wakeup the CPU after any recessive-to-dominant edge on the CAN bus.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Freescale Semiconductor
157