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MC908GZ60CFUE Datasheet, PDF (30/352 Pages) Freescale Semiconductor, Inc – Standard features, Features of the CPU08
General Description
VREFL is the low reference supply for the ADC, and by default the VSSAD/VREFL pin should be connected
to the same voltage potential as VSS. See Chapter 3 Analog-to-Digital Converter (ADC).
1.5.8 Port A Input/Output (I/O) Pins (PTA7/KBD7/AD15–PTA0/KBD0/AD8)
PTA7–PTA0 are general-purpose, bidirectional I/O port pins. Any or all of the port A pins can be
programmed to serve as keyboard interrupt pins or used as analog-to-digital inputs. PTA7–PTA4 are only
available on the 48-pin LQFP and 64-pin QFP packages. See Chapter 13 Input/Output (I/O) Ports,
Chapter 9 Keyboard Interrupt Module (KBI), and Chapter 3 Analog-to-Digital Converter (ADC).
These port pins also have selectable pullups when configured for input mode. The pullups are disengaged
when configured for output mode. The pullups are selectable on an individual port bit basis.
1.5.9 Port B I/O Pins (PTB7/AD7–PTB0/AD0)
PTB7–PTB0 are general-purpose, bidirectional I/O port pins that can also be used for analog-to-digital
converter (ADC) inputs. PTB7–PTB6 are only available on the 48-pin LQFP and 64-pin QFP packages.
See Chapter 13 Input/Output (I/O) Ports and Chapter 3 Analog-to-Digital Converter (ADC).
1.5.10 Port C I/O Pins (PTC6–PTC0/CANTX)
PTC6 and PTC5 are general-purpose, bidirectional I/O port pins.
PTC4–PTC0 are general-purpose, bidirectional I/O port pins that contain higher current sink/source
capability. PTC6–PTC2 are only available on the 48-pin LQFP and 64-pin QFP packages. See Chapter
13 Input/Output (I/O) Ports.
PTC1 and PTC0 can be programmed to be MSCAN08 pins.
These port pins also have selectable pullups when configured for input mode. The pullups are disengaged
when configured for output mode. The pullups are selectable on an individual port bit basis.
1.5.11 Port D I/O Pins (PTD7/T2CH1–PTD0/SS)
PTD7–PTD0 are special-function, bidirectional I/O port pins. PTD3–PTD0 can be programmed to be
serial peripheral interface (SPI) pins, while PTD7–PTD4 can be individually programmed to be timer
interface module (TIM1 and TIM2) pins. PTD0 can be used to output a clock, MCLK. PTD7 is only
available on the 48-pin LQFP and 64-pin QFP packages. See Chapter 18 Timer Interface Module (TIM1),
Chapter 19 Timer Interface Module (TIM2), Chapter 16 Serial Peripheral Interface (SPI) Module, Chapter
13 Input/Output (I/O) Ports. and Chapter 5 Configuration Register (CONFIG).
These port pins also have selectable pullups when configured for input mode. The pullups are disengaged
when configured for output mode. The pullups are selectable on an individual port bit basis.
1.5.12 Port E I/O Pins (PTE5–PTE2, PTE1/RxD, and PTE0/TxD)
PTE5–PTE0 are general-purpose, bidirectional I/O port pins. PTE1 and PTE0 can also be programmed
to be enhanced serial communications interface (ESCI) pins. PTE5–PTE2 are only available on the
48-pin LQFP and 64-pin QFP packages. See Chapter 14 Enhanced Serial Communications Interface
(ESCI) Module and Chapter 13 Input/Output (I/O) Ports.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
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Freescale Semiconductor